The present invention relates to a multi-stage voltage-boosting circuit of the charge-pump type, more particularly to the back-gate biasing of transistors in such a voltage-boosting circuit.
Multi-stage voltage-boosting circuits are used, for example, to generate the high voltages needed for programming and erasing electrically-erasable programmable read-only memory (EEPROM) devices. A conventional voltage-boosting circuit of this type, which will be described in more detail later, comprises a plurality of field-effect transistors disposed in a common semiconductor substrate, and a like plurality of capacitors. The transistors are coupled in series, and the capacitors are coupled to respective transistors, each transistor-capacitor pair forming one stage of the circuit. The capacitors are driven by two complementary clock signals in such a way that charge is pumped through the circuit with a voltage boost in each stage.
A problem in the conventional circuit is that as all transistors in the series are formed in the same substrate, due to the voltage boosting, the back-gate bias of the transistors becomes progressively deeper in later stages of the circuit. The increased back-gate bias leads to progressively larger voltage drops in the transistors, thereby increasing the number of stages needed to produce a given boosted output voltage. Eventually the back-gate bias becomes so great that the voltage drop equals the voltage boost in each stage, setting an absolute upper limit on the attainable output voltage, unless the voltage swing of the complementary clock signals is increased. The conventional voltage-boosting circuit thus takes up much space, requires comparatively high-voltage clock signals, and has a limited voltage-boosting capability.